2013-02-22 rev.1.0 74VHC165FT 1 cmos digital integrated circuits silicon monolithic 74VHC165FT 74VHC165FT 74VHC165FT 74VHC165FT 1. 1. 1. 1. functional description functional description functional description functional description ? 8-bit shift register (p-in, s-out) 2. 2. 2. 2. general general general general the 74VHC165FT is an advanced high speed cmos 8-bit parallel/serial-in, serial-out shift register fabricated with silicon gate c 2 mos technology. it achieves the high speed operation similar to equivalent bipolar schottky ttl while maintaining the cmos low power dissipation. it consists of parallel-in or serial-in, serial-out 8-bit shift register with a gated clock input. when the shift/ load input is held high, the serial data input is enabled and the eight frip-frops perform serial shifting with each clock pulse. when the shift/ load input is held low, the parallel data is loaded synchronously into the register at positive going transition of the clock pulse. the ck-inh input should be shifted high only when the ck input is held high. an input protection circuit ensures that 0 to 5.5 v can be applied to the input pins without regard to the supply voltage. this device can be used to interface 5 v to 3 v systems and on two supply systems such as battery back up. this circuit prevents device destruction due to mismatched supply and input voltages. 3. 3. 3. 3. features features features features (1) high speed: f max = 150 mhz (typ.) at v cc = 5 v (2) low power dissipation: i cc = 4 a (max) at t a = 25 (3) high noise immunity: v nih = v nil = 28 % v cc (min) (4) power-down protection is provided on all inputs. (5) balanced propagation delays: t plh t phl (6) wide operating voltage range: v cc(opr) = 2 v to 5.5 v (7) pin and function compatible with 74 series (74ac/hc/ahc etc.) 165 type. 4. 4. 4. 4. packaging packaging packaging packaging tssop16b
2013-02-22 rev.1.0 74VHC165FT 2 5. 5. 5. 5. pin assignment pin assignment pin assignment pin assignment 6. 6. 6. 6. marking marking marking marking 7. 7. 7. 7. iec logic symbol iec logic symbol iec logic symbol iec logic symbol
2013-02-22 rev.1.0 74VHC165FT 3 8. 8. 8. 8. truth table truth table truth table truth table x: don't care a.....h: the level of steady state input voltage at inputs a through h respectively. qa n to qg n : the level of qa to qg, respectively, before the most recent positive transition of the ck. 9. 9. 9. 9. timing diagrams timing diagrams timing diagrams timing diagrams
2013-02-22 rev.1.0 74VHC165FT 4 10. 10. 10. 10. system diagram system diagram system diagram system diagram 11. 11. 11. 11. absolute maximum ratings (note) absolute maximum ratings (note) absolute maximum ratings (note) absolute maximum ratings (note) characteristics supply voltage input voltage output voltage input diode current output diode current output current v cc /ground current power dissipation storage temperature symbol v cc v in v out i ik i ok i out i cc p d t stg rating -0.5 to 7.0 -0.5 to 7.0 -0.5 to v cc + 0.5 -20 20 25 50 180 -65 to 150 unit v v v ma ma ma ma mw note: exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in ic performance or even destruction. using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings and the operating ranges. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook ( handling precautions / derating concept and methods ) and individual reliability data (i.e. reliability test report and estimated failure rate, etc).
2013-02-22 rev.1.0 74VHC165FT 5 12. 12. 12. 12. operating ranges (note) operating ranges (note) operating ranges (note) operating ranges (note) characteristics supply voltage input voltage output voltage operating temperature input rise and fall times symbol v cc v in v out t opr dt/dv test condition v cc = 3.3 0.3 v v cc = 5 0.5 v rating 2.0 to 5.5 0 to 5.5 0 to v cc -40 to 85 0 to 100 0 to 20 unit v v v ns/v note: the operating ranges must be maintained to ensure the normal operation of the device. unused inputs must be tied to either v cc or gnd. 13. 13. 13. 13. electrical characteristics electrical characteristics electrical characteristics electrical characteristics 13.1. 13.1. 13.1. 13.1. dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t a a a a = 25 = 25 = 25 = 25 ) ) ) ) characteristics high-level input voltage low-level input voltage high-level output voltage low-level output voltage input leakage current quiescent supply current symbol v ih v il v oh v ol i in i cc test condition v in = v ih or v il v in = v ih or v il v in = 5.5 v or gnd v in = v cc or gnd i oh = -50 a i oh = -4 ma i oh = -8 ma i ol = 50 a i ol = 4 ma i ol = 8 ma v cc (v) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 0 to 5.5 5.5 min 1.50 v cc 0.7 1.9 2.9 4.4 2.58 3.94 typ. 2.0 3.0 4.5 0.0 0.0 0.0 max 0.50 v cc 0.3 0.1 0.1 0.1 0.36 0.36 0.1 4.0 unit v v v v a a 13.2. 13.2. 13.2. 13.2. dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t dc characteristics (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 ) ) ) ) characteristics high-level input voltage low-level input voltage high-level output voltage low-level output voltage input leakage current quiescent supply current symbol v ih v il v oh v ol i in i cc test condition v in = v ih or v il v in = v ih or v il v in = 5.5 v or gnd v in = v cc or gnd i oh = -50 a i oh = -4 ma i oh = -8 ma i ol = 50 a i ol = 4 ma i ol = 8 ma v cc (v) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 2.0 3.0 4.5 3.0 4.5 0 to 5.5 5.5 min 1.5 v cc 0.7 1.9 2.9 4.4 2.48 3.80 max 0.5 v cc 0.3 0.1 0.1 0.1 0.44 0.44 1.0 40.0 unit v v v v a a
2013-02-22 rev.1.0 74VHC165FT 6 13.3. 13.3. 13.3. 13.3. timing requirements (unless otherwise specified, t timing requirements (unless otherwise specified, t timing requirements (unless otherwise specified, t timing requirements (unless otherwise specified, t a a a a = 25 = 25 = 25 = 25 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 3 ns) = 3 ns) = 3 ns) = 3 ns) characteristics minimum pulse width (ck, ck inh) minimum pulse width (s/ l ) minimum setup time (pi-s/ l ) minimum setup time (si-ck, ck inh) minimum setup time (s/ l -ck, ck inh) minimum hold time (pi-s/ l ) minimum hold time (si-ck, ck inh) minimum hold time (s/ l -ck, ck inh) minimum removal time (ck inh-ck), (ck-ck inh) symbol t w(l) ,t w(h) t w(l) t s t s t s t h t h t h t rem test condition v cc (v) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 limit 6.0 4.0 7.5 5.0 7.5 5.0 5.0 4.0 5.0 4.0 0.5 1.0 0.0 0.5 0.0 0.5 5.0 3.5 unit ns ns ns ns ns ns ns ns ns 13.4. 13.4. 13.4. 13.4. timing requirements timing requirements timing requirements timing requirements (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 3 ns) = 3 ns) = 3 ns) = 3 ns) characteristics minimum pulse width (ck, ck inh) minimum pulse width (s/ l ) minimum setup time (pi-s/ l ) minimum setup time (si-ck, ck inh) minimum setup time (s/ l -ck, ck inh) minimum hold time (pi-s/ l ) minimum hold time (si-ck, ck inh) minimum hold time (s/ l -ck, ck inh) minimum removal time (ck inh-ck), (ck-ck inh) symbol t w(l) ,t w(h) t w(l) t s t s t s t h t h t h t rem test condition v cc (v) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 limit 7.0 4.0 9.0 6.0 8.5 5.0 6.0 4.0 6.0 4.0 0.5 1.0 0.0 0.5 0.0 0.5 5.0 3.5 unit ns ns ns ns ns ns ns ns ns
2013-02-22 rev.1.0 74VHC165FT 7 13.5. 13.5. 13.5. 13.5. ac characteristics (unless otherwise specified, t ac characteristics (unless otherwise specified, t ac characteristics (unless otherwise specified, t ac characteristics (unless otherwise specified, t a a a a = 25 = 25 = 25 = 25 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 3 ns) = 3 ns) = 3 ns) = 3 ns) characteristics propagation delay time (ck, ck inh-qh, q h) propagation delay time (s/ l -qh, q h) propagation delay time (h-qh, q h) maximum clock frequency input capacitance power dissipation capacitance symbol t plh ,t phl t plh ,t phl t plh ,t phl f max c in c pd note (note 1) test condition v cc (v) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 c l (pf) 15 50 15 50 15 50 15 50 15 50 15 50 15 50 15 50 min 65 60 110 95 typ. 9.9 12.4 6.6 8.1 9.9 12.4 6.7 8.2 9.2 11.7 5.9 7.4 85 105 150 130 4 50 max 15.4 18.9 9.9 11.9 15.8 19.3 9.9 11.9 14.1 17.6 9.0 11.0 10 unit ns ns ns mhz pf pf note 1: c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. average operating current can be obtained by the equation. i cc(opr) = c pd v cc f in + i cc 13.6. 13.6. 13.6. 13.6. ac characteristics ac characteristics ac characteristics ac characteristics (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t (unless otherwise specified, t a a a a = -40 to 85 = -40 to 85 = -40 to 85 = -40 to 85 , input: t , input: t , input: t , input: t r r r r = t = t = t = t f f f f = 3 ns) = 3 ns) = 3 ns) = 3 ns) characteristics propagation delay time (ck, ck inh-qh, q h) propagation delay time (s/ l -qh, q h) propagation delay time (h-qh, q h) maximum clock frequency input capacitance symbol t plh ,t phl t plh ,t phl t plh ,t phl f max c in test condition v cc (v) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 c l (pf) 15 50 15 50 15 50 15 50 15 50 15 50 15 50 15 50 min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 55 50 90 85 max 18.0 21.5 11.5 13.5 18.5 22.0 11.5 13.5 16.5 20.0 10.5 12.5 10 unit ns ns ns mhz pf
2013-02-22 rev.1.0 74VHC165FT 8 14. 14. 14. 14. internal equivalent circuit internal equivalent circuit internal equivalent circuit internal equivalent circuit package dimensions package dimensions package dimensions package dimensions unit: mm weight: 0.055 g (typ.) package name(s) nickname: tssop16b
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